# Builder's Daily — Silicon & Systems > Rolling 14-day signal for beat `silicon-systems`. Ephemeral context — not evergreen corpus. > Author: Amit Kumar Agrawal | https://artificialcuriositylabs.ai > Generated: 2026-06-10 > Human index: https://artificialcuriositylabs.ai/daily/silicon-systems/ > RSS: https://artificialcuriositylabs.ai/daily/silicon-systems/rss.xml --- # Silicon & Systems — June 9, 2026 **URL:** https://artificialcuriositylabs.ai/daily/silicon-systems/2026-06-09/ **Beat:** silicon-systems **Date:** 2026-06-09 **Topics:** Intel, NVIDIA, Google, TPU, 18A, foundry **Summary:** Intel Foundry gains momentum: Google reportedly orders 3M TPUs through 2028, NVIDIA evaluates Intel 18A for Feynman multi-die GPU; NVIDIA and SK hynix a… ## The read AI is electricity — literally and figuratively. Silicon supply sets the floor on inference economics; power and data center capacity set the ceiling. Track the physical stack not as separate coverage but as the mechanism behind why inference economics and inference access move. ## What moved - **Intel Foundry gains momentum: Google reportedly orders 3M TPUs through 2028, NVIDIA evaluates Intel 18A for Feynman multi-die GPU** — [TrendForce](https://www.trendforce.com/news/2026/06/09/news-intel-foundry-gains-momentum-as-google-reportedly-orders-3m-tpus-nvidia-evaluates-18a-for-multi-die-gpu-design/) TrendForce reports Google has placed orders for more than 3 million TPU chips with Intel Foundry through 2028, representing roughly half of Google's projected 2028 TPU output; Google's TPU v8e (expected H2 2027) will use Intel EMIB packaging now at ~90% yield. Separately, NVIDIA is running early multi-project wafer feasibility tests on Intel's 18A process for a next-generation Feynman GPU design integrating four dies in a single package. Tesla is Intel Foundry's first confirmed 14A customer. TSMC remains NVIDIA's primary fab for current Rubin 3nm production. **Builder angle:** If NVIDIA qualifies Intel 18A for multi-die Feynman GPUs (~2028 horizon), it opens a second high-volume fab for leading-edge AI accelerators beyond TSMC CoWoS, potentially loosening the packaging bottleneck that currently constrains GPU supply. - **NVIDIA and SK hynix announce multiyear technology partnership to advance memory for AI factories** — [NVIDIA Newsroom](https://nvidianews.nvidia.com/news/sk-hynix-ai-factory) NVIDIA and SK hynix announced a formal multiyear co-development partnership on June 7 covering next-generation DRAM and NAND for four platform categories: Vera Rubin AI supercomputers, Vera CPUs, RTX Spark PCs, and Jetson Thor robotics. The companies will use CUDA-X, PhysicsNeMo, and Omniverse to accelerate SK hynix's chip design simulation and to build autonomous digital-twin fabs. No specific supply volumes were disclosed, but the agreement aligns SK hynix's memory roadmap to NVIDIA's long-term infrastructure timeline across AI, personal, and physical AI sectors. **Builder angle:** A formal NVIDIA–SK hynix roadmap lock-in means HBM and advanced DRAM development cycles will track NVIDIA's platform releases rather than open-market demand, narrowing spot-market allocation for buyers outside contracted hyperscalers. - **NVIDIA Vera Rubin enters full production; Jensen Huang confirms all three HBM4 suppliers qualified for Q3 2026 customer shipments** — [TechTimes](https://www.techtimes.com/articles/317855/20260605/nvidia-vera-rubin-hbm4-jensen-huang-confirms-all-three-suppliers-production-q3-ship.htm) At GTC Taipei (June 1) Jensen Huang announced Vera Rubin is in full production, with customer shipments scheduled for Q3 2026. In Seoul on June 5 he confirmed all three HBM4 suppliers—Samsung, SK hynix, and Micron—are qualified and in production: 'All three vendors have been qualified. All three vendors are in production, and they're all racing to support Vera Rubin.' Industry analysts estimate SK hynix holds ~60–70% of allocated HBM4 volume, Samsung ~25–30%, Micron the remainder. H2 2026 production volume is expected to be 'considerably larger' than H1, with 2027 larger still. **Builder angle:** Q3 2026 is now the concrete delivery window for Vera Rubin accelerators; builders planning AI infrastructure upgrades have a locked timeline, and the three-supplier HBM4 setup reduces single-source risk on memory availability. - **Glass substrates eye 2027 commercialization as CoWoS costs rise and hyperscaler demand grows** — [TrendForce](https://www.trendforce.com/news/2026/06/05/news-glass-substrates-eye-2027-launch-scale-toward-2030-as-cowos-costs-rise-and-hyperscaler-demand-grows/) TSMC, Intel, Samsung Electro-Mechanics, and Korean substrate firms are racing to commercialize glass substrates as CoWoS costs rise and AI packaging demand outpaces organic-ABF capacity. Key timeline: TSMC built a 310×310 mm CoPoS pilot line; Samsung Electro-Mechanics targets mass production at its Sejong plant in H2 2027; SKC/Absolics completed a KRW 1.76 trillion rights offering and is supplying prototypes to a U.S. telecom chip company. Intel is targeting commercialization around 2030 via its Rio Rancho co-packaged optics line. NVIDIA and Google are identified as the primary demand drivers. Full-scale mass production is not expected before 2030. **Builder angle:** Glass substrates will not relieve today's CoWoS bottleneck before 2027–2028 at the earliest; builders planning GPU cluster expansions should budget around continued packaging constraints and expect CoWoS lead times to remain stretched through 2026–2027. - **LITEON and QCT showcase 800V DC liquid-cooled 110 kW power rack for NVIDIA Vera Rubin NVL72 at Computex 2026** — [LITEON Press Center](https://www.liteon.com/en/news/press-center/content/liteon-qct-computex-2026) LITEON and QCT jointly unveiled an 800V DC liquid-cooled power rack with integrated cold plates and a 110 kW rack-level power shelf alongside CRPS PSUs with three-phase input and intelligent load-balancing, co-designed for the NVIDIA Vera Rubin NVL72 platform. The architecture co-designs power delivery and thermal management as a single system to handle transient load fluctuations in dense AI inference racks. **Builder angle:** Operators planning Vera Rubin NVL72 deployments now have a validated 800V DC liquid-cooled power path that eliminates separate thermal/power system integrations, reducing rack-level design complexity and procurement surface. ## Also tracking - **Navitas joins NVIDIA MGX ecosystem with 800V-to-6V GaN power delivery board at 97.5% efficiency and 2,100 W/in³** — [source](https://navitassemi.com/navitas-collaborates-with-nvidia-mgx-ecosystem-to-accelerate-800-vdc-ai-infrastructure/) — Eliminating the 48V intermediate stage in 800V DC AI racks removes one full conversion loss, reducing heat budget per rack and enabling higher GPU density in the same floor footprint. - **GridReadiness June 2026 brief: GE Vernova at 60+ months backlog; France brownfield offers 18–26 month transformer path for 2028 commissioning** — [source](https://www.gridreadiness.com/data/monthly-brief-june-2026.html) — Any project targeting 2028 commissioning must bypass Tier 1 transformer vendors entirely and lock France or secondary-tier suppliers now before remaining inventory is absorbed. - **Wolfspeed Gen 5 SiC MOSFETs launch with 27% lower on-resistance than competition at 750V and 1200V nodes** — [source](https://www.businesswire.com/news/home/20260609876239/en/Wolfspeed-Unveils-the-Industrys-Lowest-RDSON-Silicon-Carbide-SiC-MOSFETs-in-New-Technology-Generation) — Lower Rds(on) at 1200V narrows the efficiency gap between SiC and GaN for high-voltage AI data center power supplies, giving procurement teams a near-term SiC supply option on a published roadmap. --- # Silicon & Systems — June 6, 2026 **URL:** https://artificialcuriositylabs.ai/daily/silicon-systems/2026-06-06/ **Beat:** silicon-systems **Date:** 2026-06-06 **Topics:** hbm, sk-hynix, memory-capacity, lead-time, inference-gpu, intel **Summary:** SK Hynix to double wafer capacity as 2026 HBM output is sold out; Intel unveils Crescent Island inference GPU with 480 GB LPDDR5X, skipping HBM; TSMC CE… ## The read AI is electricity — literally and figuratively. Silicon supply sets the floor on inference economics; power and data center capacity set the ceiling. Track the physical stack not as separate coverage but as the mechanism behind why inference economics and inference access move. ## What moved - **SK Hynix to double wafer capacity as 2026 HBM output is sold out** — [Techzine](https://www.techzine.eu/news/devices/141775/sk-hynix-to-double-wafer-capacity-amid-ai-memory-shortage/) SK Hynix chairman Chey Tae-won said at Computex in Taipei that the company will double memory wafer production capacity over five years, citing AI-driven shortages that could persist through 2030. The company has already sold out its entire 2026 memory production and committed approximately $15 billion to HBM and advanced DRAM expansion in 2026, with Nvidia among its top customers. **Builder angle:** HBM supply remains sold out through 2026, so five-year wafer doubling will not relieve near-term allocation constraints on AI accelerator builds. - **Intel unveils Crescent Island inference GPU with 480 GB LPDDR5X, skipping HBM** — [Intel Newsroom](https://newsroom.intel.com/data-center/intel-puts-agentic-ai-xeon-6-networking-ai-systems) At Computex on June 1, 2026, Intel disclosed Crescent Island, a Xe3P data center inference GPU using up to 480 GB of LPDDR5X instead of HBM, in a 350 W air-cooled PCIe form factor. The design targets token-intensive agentic AI workloads and avoids the HBM supply bottleneck constraining Nvidia and AMD accelerators. **Builder angle:** An HBM-free 350 W PCIe inference card offers a scale-out procurement path where HBM allocation is the binding constraint on GPU availability. - **TSMC CEO warns AI chip shortages will persist for years** — [Techzine](https://www.techzine.eu/news/infrastructure/141838/tsmc-expects-ai-chip-shortage-to-persist-for-years/) At TSMC's June 4, 2026 annual shareholder meeting, CEO C.C. Wei said demand for advanced AI chips will outpace production capacity for years, even with six U.S. fabs under construction and capex at the upper end of a $56 billion range. TSMC raised its 2026 revenue growth forecast above 30% while prioritizing measured price increases over memory-style spikes. **Builder angle:** TSMC's multi-year shortage outlook signals extended lead times on 3nm/2nm accelerator wafers, pushing builders toward long-term foundry allocation contracts. - **Google pairs Texas Meitner AI campus with 1 GW of co-located generation** — [Data Center Knowledge](https://www.datacenterknowledge.com/energy-power-supply/google-bets-on-a-power-first-model-for-ai-data-centers) Google and Intersect are building the Meitner Texas AI campus alongside more than 1 GW of wind, solar, battery storage, and on-site gas generation under a "power-first" model that secures dedicated supply before scaling compute. A prior Haskell County project pairs a Google data center with Intersect's 640 MW Quantum solar plus 1.3 GWh storage, scheduled to begin operations in June 2026. ERCOT approved its Batch Zero framework this month to streamline transmission capacity allocation for large-load projects with co-located generation. **Builder angle:** Hyperscalers are co-locating gigawatt-scale generation with AI campuses to bypass multi-year grid interconnection queues that gate new rack deployments. - **Infineon joins NVIDIA MGX ecosystem for 800 VDC grid-to-rack power** — [Power Electronics News](https://www.powerelectronicsnews.com/infineon-joins-nvidia-mgx-ecosystem-for-800-vdc-ai-power-architectures/) Infineon joined NVIDIA's MGX modular AI server reference architecture to supply grid-to-core power conversion for 800 VDC distribution. The portfolio spans 800 VDC down to 50 V and 12 V intermediate buses and sub-10 V core rails, using silicon, SiC JFETs, and GaN devices for protection, hot-swap, and power management on native 800 V server boards. The design targets higher rack power density and reduced conversion-stage losses versus legacy 48–54 V distribution. **Builder angle:** 800 VDC MGX reference designs with SiC/GaN protection ICs set the rack-level power chain builders must design around for next-gen GPU density. ## Also tracking - **Skeleton launches GrapheneUPS for AI data center grid compliance** — [source](https://www.skeletontech.com/news/skeleton-launches-grapheneups-a-high-density-ups-designed-for-ai-infrastructure) — Load-proximate UPS that shrinks required grid connection size directly raises achievable MW/rack density where interconnection capacity is the binding constraint. - **NVIDIA and IREN partner on up to 5 GW DSX AI infrastructure pipeline** — [source](https://nvidianews.nvidia.com/news/nvidia-and-iren-announce-strategic-partnership-to-accelerate-deployment-of-up-to-5-gigawatts-of-ai-infrastructure) — Anchors a multi-gigawatt U.S. AI factory pipeline with Texas Sweetwater as the first DSX deployment target for rented GPU capacity. - **CloudBurst Data Centers breaks ground on 1.2 GW Texas campus** — [source](https://www.datacenterdynamics.com/en/news/cloudburst-data-centers-breaks-ground-on-12-gw-texas-campus/) — Adds 1.2 GW of committed Texas shell capacity beyond Sweetwater — a second major Gulf Coast AI factory lane coming online.