Builder's Daily / Silicon & Systems
Silicon & Systems — June 9, 2026
What constrains AI compute capacity and at what cost?
- Intel
- NVIDIA
- TPU
- 18A
- foundry
The read
AI is electricity — literally and figuratively. Silicon supply sets the floor on inference economics; power and data center capacity set the ceiling. Track the physical stack not as separate coverage but as the mechanism behind why inference economics and inference access move.
What moved
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Intel Foundry gains momentum: Google reportedly orders 3M TPUs through 2028, NVIDIA evaluates Intel 18A for Feynman multi-die GPU — TrendForce TrendForce reports Google has placed orders for more than 3 million TPU chips with Intel Foundry through 2028, representing roughly half of Google’s projected 2028 TPU output; Google’s TPU v8e (expected H2 2027) will use Intel EMIB packaging now at ~90% yield. Separately, NVIDIA is running early multi-project wafer feasibility tests on Intel’s 18A process for a next-generation Feynman GPU design integrating four dies in a single package. Tesla is Intel Foundry’s first confirmed 14A customer. TSMC remains NVIDIA’s primary fab for current Rubin 3nm production. Builder angle: If NVIDIA qualifies Intel 18A for multi-die Feynman GPUs (~2028 horizon), it opens a second high-volume fab for leading-edge AI accelerators beyond TSMC CoWoS, potentially loosening the packaging bottleneck that currently constrains GPU supply.
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NVIDIA and SK hynix announce multiyear technology partnership to advance memory for AI factories — NVIDIA Newsroom NVIDIA and SK hynix announced a formal multiyear co-development partnership on June 7 covering next-generation DRAM and NAND for four platform categories: Vera Rubin AI supercomputers, Vera CPUs, RTX Spark PCs, and Jetson Thor robotics. The companies will use CUDA-X, PhysicsNeMo, and Omniverse to accelerate SK hynix’s chip design simulation and to build autonomous digital-twin fabs. No specific supply volumes were disclosed, but the agreement aligns SK hynix’s memory roadmap to NVIDIA’s long-term infrastructure timeline across AI, personal, and physical AI sectors. Builder angle: A formal NVIDIA–SK hynix roadmap lock-in means HBM and advanced DRAM development cycles will track NVIDIA’s platform releases rather than open-market demand, narrowing spot-market allocation for buyers outside contracted hyperscalers.
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NVIDIA Vera Rubin enters full production; Jensen Huang confirms all three HBM4 suppliers qualified for Q3 2026 customer shipments — TechTimes At GTC Taipei (June 1) Jensen Huang announced Vera Rubin is in full production, with customer shipments scheduled for Q3 2026. In Seoul on June 5 he confirmed all three HBM4 suppliers—Samsung, SK hynix, and Micron—are qualified and in production: ‘All three vendors have been qualified. All three vendors are in production, and they’re all racing to support Vera Rubin.’ Industry analysts estimate SK hynix holds ~60–70% of allocated HBM4 volume, Samsung ~25–30%, Micron the remainder. H2 2026 production volume is expected to be ‘considerably larger’ than H1, with 2027 larger still. Builder angle: Q3 2026 is now the concrete delivery window for Vera Rubin accelerators; builders planning AI infrastructure upgrades have a locked timeline, and the three-supplier HBM4 setup reduces single-source risk on memory availability.
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Glass substrates eye 2027 commercialization as CoWoS costs rise and hyperscaler demand grows — TrendForce TSMC, Intel, Samsung Electro-Mechanics, and Korean substrate firms are racing to commercialize glass substrates as CoWoS costs rise and AI packaging demand outpaces organic-ABF capacity. Key timeline: TSMC built a 310×310 mm CoPoS pilot line; Samsung Electro-Mechanics targets mass production at its Sejong plant in H2 2027; SKC/Absolics completed a KRW 1.76 trillion rights offering and is supplying prototypes to a U.S. telecom chip company. Intel is targeting commercialization around 2030 via its Rio Rancho co-packaged optics line. NVIDIA and Google are identified as the primary demand drivers. Full-scale mass production is not expected before 2030. Builder angle: Glass substrates will not relieve today’s CoWoS bottleneck before 2027–2028 at the earliest; builders planning GPU cluster expansions should budget around continued packaging constraints and expect CoWoS lead times to remain stretched through 2026–2027.
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LITEON and QCT showcase 800V DC liquid-cooled 110 kW power rack for NVIDIA Vera Rubin NVL72 at Computex 2026 — LITEON Press Center LITEON and QCT jointly unveiled an 800V DC liquid-cooled power rack with integrated cold plates and a 110 kW rack-level power shelf alongside CRPS PSUs with three-phase input and intelligent load-balancing, co-designed for the NVIDIA Vera Rubin NVL72 platform. The architecture co-designs power delivery and thermal management as a single system to handle transient load fluctuations in dense AI inference racks. Builder angle: Operators planning Vera Rubin NVL72 deployments now have a validated 800V DC liquid-cooled power path that eliminates separate thermal/power system integrations, reducing rack-level design complexity and procurement surface.
Also tracking
- Navitas joins NVIDIA MGX ecosystem with 800V-to-6V GaN power delivery board at 97.5% efficiency and 2,100 W/in³ — source — Eliminating the 48V intermediate stage in 800V DC AI racks removes one full conversion loss, reducing heat budget per rack and enabling higher GPU density in the same floor footprint.
- GridReadiness June 2026 brief: GE Vernova at 60+ months backlog; France brownfield offers 18–26 month transformer path for 2028 commissioning — source — Any project targeting 2028 commissioning must bypass Tier 1 transformer vendors entirely and lock France or secondary-tier suppliers now before remaining inventory is absorbed.
- Wolfspeed Gen 5 SiC MOSFETs launch with 27% lower on-resistance than competition at 750V and 1200V nodes — source — Lower Rds(on) at 1200V narrows the efficiency gap between SiC and GaN for high-voltage AI data center power supplies, giving procurement teams a near-term SiC supply option on a published roadmap.